发信人: siemens()
整理人: camelsu(2001-01-30 01:24:15), 站内信件
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--------VHDL-AMS教程在eda.silversand.net可DL-------------
The IEEE 1076.1 Working Group has been created under the auspices of t he IEEE Design Automation Standards Committee (DASC) with the charter to develop and to maintain analog and mixed-signal extensions to the V HDL language. These extensions enhance VHDL such that it can support t he description and simulation of circuits and systems that exhibit con tinuous behavior over time and over amplitude.
The IEEE Standard 1076.1-1999 has been approved on March 18,1999 and t he 1076.1 Language Reference Manual will be soon available from the IE EE. VHDL 1076.1-1999 is a strict extension of VHDL 1076-1993, i.e. it includes the full VHDL 1076-1993 language. Extensions have been carefu lly designed to maintain the existing philosophy and to smoothly integ rate new language definitions.
This is the official site of the 1076.1 Working Group. It provides a l ot of information about the working group organization, the developmen t and the maintenance of the 1076.1 language. It also provides links t o other related sites, including available VHDL 1076.1 tools.
A final note: VHDL 1076.1 is also informally known as VHDL-AMS where A MS stands for "Analog and Mixed-Signal". The two notations are freely mixed in this site but they refer to the same language.
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