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static inline void

switch_mm(struct mm_struct *prev, struct mm_struct *next,

         struct task_struct *tsk, unsigned int cpu)

{

       if (prev != next)

              cpu_switch_mm(next->pgd, tsk);

}

#define cpu_switch_mm(pgd,tsk) cpu_set_pgd(__virt_to_phys((unsigned long)(pgd)))

#define cpu_get_pgd()      \

       ({                                        \

              unsigned long pg;                     \

              __asm__("mrc p15, 0, %0, c2, c0, 0"      \

                      : "=r" (pg));                \

              pg &= ~0x3fff;                           \

              (pgd_t *)phys_to_virt(pg);         \

       })

/*

 * Register switch for ARMv3 and ARMv4 processors

 * r0 = previous, r1 = next, return previous.

 * previous and next are guaranteed not to be the same.

 */ 

ENTRY(__switch_to)

              stmfd      sp!, {r4 - sl, fp, lr}        @ Store most regs on stack

              mrs ip, cpsr

              str   ip, [sp, #-4]!                 @ Save cpsr_SVC

              str   sp, [r0, #TSS_SAVE]         @ Save sp_SVC

              ldr   sp, [r1, #TSS_SAVE]         @ Get saved sp_SVC

              ldr   r2, [r1, #TSS_DOMAIN]

              ldr   ip, [sp], #4

              mcr p15, 0, r2, c3, c0        @ Set domain register

              msr spsr, ip                 @ Save tasks CPSR into SPSR for this return

              ldmfd      sp!, {r4 - sl, fp, pc}^            @ Load all regs saved previously

struct context_save_struct {

       unsigned long cpsr;

       unsigned long r4;

       unsigned long r5;

       unsigned long r6;

       unsigned long r7;

       unsigned long r8;

       unsigned long r9;

       unsigned long sl;

       unsigned long fp;

       unsigned long pc;

};